Discussion:
[edk2] [Patch 0/3] Add Sec Platform Information2 PPI
Jeff Fan
2015-06-11 08:50:36 UTC
Permalink
PI 1.4 introduced Sec Platform Inforamtion2 PPI to hand-off CPU healthy
information from SEC to PEI/DXE phase.
This serial patches will:
A. Add Sec Platform Inforamtion2 PPI in MdePkg.
B. Include PiCis.h in SecPlatformInformation.h, This file references
EFI_PEI_SERVICES but it will be used by CPU MP DXE driver to get CPU BIST
information. And PiCis.h could pass build.
C. Update UefiCpuPkg/CpuDxe drive to get CPUs' BIST information by Guided HOB.

Jeff Fan (3):
MdePkg: Add Sec Platform Information2 PPI
MdePkg: Include PiCis.h in SecPlatformInformation.h
UefiCpuPkg/CpuDxe: Get CPU BIST information from Guided HOB

MdePkg/Include/Ppi/SecPlatformInformation.h | 4 +-
MdePkg/Include/Ppi/SecPlatformInformation2.h | 85 ++++++++++++++++++++++++++
MdePkg/MdePkg.dec | 3 +
UefiCpuPkg/CpuDxe/CpuDxe.inf | 8 ++-
UefiCpuPkg/CpuDxe/CpuMp.c | 90 +++++++++++++++++++++++++++-
UefiCpuPkg/CpuDxe/CpuMp.h | 6 +-
6 files changed, 192 insertions(+), 4 deletions(-)
create mode 100644 MdePkg/Include/Ppi/SecPlatformInformation2.h
--
1.9.5.msysgit.0


------------------------------------------------------------------------------
Jeff Fan
2015-06-11 08:50:37 UTC
Permalink
This is a new PPI introduced in PI 1.4 to pass multiple CPU information from
SEC phase to PEI/DXE phases.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <***@intel.com>
CC: Liming Gao <***@intel.com>
---
MdePkg/Include/Ppi/SecPlatformInformation2.h | 85 ++++++++++++++++++++++++++++
MdePkg/MdePkg.dec | 3 +
2 files changed, 88 insertions(+)
create mode 100644 MdePkg/Include/Ppi/SecPlatformInformation2.h

diff --git a/MdePkg/Include/Ppi/SecPlatformInformation2.h b/MdePkg/Include/Ppi/SecPlatformInformation2.h
new file mode 100644
index 0000000..7596333
--- /dev/null
+++ b/MdePkg/Include/Ppi/SecPlatformInformation2.h
@@ -0,0 +1,85 @@
+/** @file
+ This file declares Sec Platform Information2 PPI.
+
+ This service is the primary handoff state into the PEI Foundation.
+ This service abstracts platform-specific information for many CPU's.
+
+Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This PPI is defined in PI Version 1.4.
+
+**/
+
+#ifndef __SEC_PLATFORM_INFORMATION2_PPI_H__
+#define __SEC_PLATFORM_INFORMATION2_PPI_H__
+
+#include <Ppi/SecPlatformInformation.h>
+
+#define EFI_SEC_PLATFORM_INFORMATION2_GUID \
+ { \
+ 0x9e9f374b, 0x8f16, 0x4230, {0x98, 0x24, 0x58, 0x46, 0xee, 0x76, 0x6a, 0x97 } \
+ }
+
+typedef struct _EFI_SEC_PLATFORM_INFORMATION2_PPI EFI_SEC_PLATFORM_INFORMATION2_PPI;
+
+///
+/// EFI_SEC_PLATFORM_INFORMATION_CPU.
+///
+typedef struct {
+ UINT32 CpuLocation;
+ EFI_SEC_PLATFORM_INFORMATION_RECORD InfoRecord;
+} EFI_SEC_PLATFORM_INFORMATION_CPU;
+
+///
+/// EFI_SEC_PLATFORM_INFORMATION_RECORD2.
+///
+typedef struct {
+ ///
+ /// The CPU location would be the local APIC ID
+ ///
+ UINT32 NumberOfCpus;
+ EFI_SEC_PLATFORM_INFORMATION_CPU CpuInstance[1];
+} EFI_SEC_PLATFORM_INFORMATION_RECORD2;
+
+/**
+ This interface conveys state information out of the Security (SEC) phase into PEI.
+
+ This service is published by the SEC phase.
+
+ @param PeiServices The pointer to the PEI Services Table.
+ @param StructureSize The pointer to the variable describing size of the input buffer.
+ @param PlatformInformationRecord2 The pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD2.
+
+ @retval EFI_SUCCESS The data was successfully returned.
+ @retval EFI_BUFFER_TOO_SMALL The buffer was too small. The current buffer size needed to
+ hold the record is returned in StructureSize.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SEC_PLATFORM_INFORMATION2)(
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN OUT UINT64 *StructureSize,
+ OUT EFI_SEC_PLATFORM_INFORMATION_RECORD2 *PlatformInformationRecord2
+);
+
+///
+/// This service abstracts platform-specific information for many CPU's.
+/// It is the multi-processor equivalent of PlatformInformation for
+/// implementations that synchronize all CPU's in the SEC phase.
+///
+struct _EFI_SEC_PLATFORM_INFORMATION2_PPI {
+ EFI_SEC_PLATFORM_INFORMATION2 PlatformInformation2;
+};
+
+extern EFI_GUID gEfiSecPlatformInformation2PpiGuid;
+
+#endif
diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec
index 29d7e11..677a82f 100644
--- a/MdePkg/MdePkg.dec
+++ b/MdePkg/MdePkg.dec
@@ -855,6 +855,9 @@
## Include/Ppi/BlockIo2.h
gEfiPeiVirtualBlockIo2PpiGuid = { 0x26cc0fad, 0xbeb3, 0x478a, { 0x91, 0xb2, 0xc, 0x18, 0x8f, 0x72, 0x61, 0x98 }}

+ ## Include/Ppi/SecPlatformInformation.h
+ gEfiSecPlatformInformation2PpiGuid = { 0x9e9f374b, 0x8f16, 0x4230, {0x98, 0x24, 0x58, 0x46, 0xee, 0x76, 0x6a, 0x97 } }
+
[Protocols]
## Include/Protocol/Pcd.h
gPcdProtocolGuid = { 0x11B34006, 0xD85B, 0x4D0A, { 0xA2, 0x90, 0xD5, 0xA5, 0x71, 0x31, 0x0E, 0xF7 }}
--
1.9.5.msysgit.0


------------------------------------------------------------------------------
Gao, Liming
2015-06-15 05:42:58 UTC
Permalink
Reviewed-by: Liming Gao <***@intel.com>

-----Original Message-----
From: Fan, Jeff
Sent: Thursday, June 11, 2015 4:51 PM
To: edk2-***@lists.sourceforge.net
Cc: Gao, Liming
Subject: [Patch 1/3] MdePkg: Add Sec Platform Information2 PPI

This is a new PPI introduced in PI 1.4 to pass multiple CPU information from SEC phase to PEI/DXE phases.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <***@intel.com>
CC: Liming Gao <***@intel.com>
---
MdePkg/Include/Ppi/SecPlatformInformation2.h | 85 ++++++++++++++++++++++++++++
MdePkg/MdePkg.dec | 3 +
2 files changed, 88 insertions(+)
create mode 100644 MdePkg/Include/Ppi/SecPlatformInformation2.h

diff --git a/MdePkg/Include/Ppi/SecPlatformInformation2.h b/MdePkg/Include/Ppi/SecPlatformInformation2.h
new file mode 100644
index 0000000..7596333
--- /dev/null
+++ b/MdePkg/Include/Ppi/SecPlatformInformation2.h
@@ -0,0 +1,85 @@
+/** @file
+ This file declares Sec Platform Information2 PPI.
+
+ This service is the primary handoff state into the PEI Foundation.
+ This service abstracts platform-specific information for many CPU's.
+
+Copyright (c) 2015, Intel Corporation. All rights reserved.<BR> This
+program and the accompanying materials are licensed and made available
+under the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This PPI is defined in PI Version 1.4.
+
+**/
+
+#ifndef __SEC_PLATFORM_INFORMATION2_PPI_H__
+#define __SEC_PLATFORM_INFORMATION2_PPI_H__
+
+#include <Ppi/SecPlatformInformation.h>
+
+#define EFI_SEC_PLATFORM_INFORMATION2_GUID \
+ { \
+ 0x9e9f374b, 0x8f16, 0x4230, {0x98, 0x24, 0x58, 0x46, 0xee, 0x76,
+0x6a, 0x97 } \
+ }
+
+typedef struct _EFI_SEC_PLATFORM_INFORMATION2_PPI
+EFI_SEC_PLATFORM_INFORMATION2_PPI;
+
+///
+/// EFI_SEC_PLATFORM_INFORMATION_CPU.
+///
+typedef struct {
+ UINT32 CpuLocation;
+ EFI_SEC_PLATFORM_INFORMATION_RECORD InfoRecord; }
+EFI_SEC_PLATFORM_INFORMATION_CPU;
+
+///
+/// EFI_SEC_PLATFORM_INFORMATION_RECORD2.
+///
+typedef struct {
+ ///
+ /// The CPU location would be the local APIC ID
+ ///
+ UINT32 NumberOfCpus;
+ EFI_SEC_PLATFORM_INFORMATION_CPU CpuInstance[1];
+} EFI_SEC_PLATFORM_INFORMATION_RECORD2;
+
+/**
+ This interface conveys state information out of the Security (SEC) phase into PEI.
+
+ This service is published by the SEC phase.
+
+ @param PeiServices The pointer to the PEI Services Table.
+ @param StructureSize The pointer to the variable describing size of the input buffer.
+ @param PlatformInformationRecord2 The pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD2.
+
+ @retval EFI_SUCCESS The data was successfully returned.
+ @retval EFI_BUFFER_TOO_SMALL The buffer was too small. The current buffer size needed to
+ hold the record is returned in StructureSize.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SEC_PLATFORM_INFORMATION2)(
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN OUT UINT64 *StructureSize,
+ OUT EFI_SEC_PLATFORM_INFORMATION_RECORD2 *PlatformInformationRecord2
+);
+
+///
+/// This service abstracts platform-specific information for many CPU's.
+/// It is the multi-processor equivalent of PlatformInformation for ///
+implementations that synchronize all CPU's in the SEC phase.
+///
+struct _EFI_SEC_PLATFORM_INFORMATION2_PPI {
+ EFI_SEC_PLATFORM_INFORMATION2 PlatformInformation2; };
+
+extern EFI_GUID gEfiSecPlatformInformation2PpiGuid;
+
+#endif
diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec index 29d7e11..677a82f 100644
--- a/MdePkg/MdePkg.dec
+++ b/MdePkg/MdePkg.dec
@@ -855,6 +855,9 @@
## Include/Ppi/BlockIo2.h
gEfiPeiVirtualBlockIo2PpiGuid = { 0x26cc0fad, 0xbeb3, 0x478a, { 0x91, 0xb2, 0xc, 0x18, 0x8f, 0x72, 0x61, 0x98 }}

+ ## Include/Ppi/SecPlatformInformation.h
+ gEfiSecPlatformInformation2PpiGuid = { 0x9e9f374b, 0x8f16, 0x4230,
+ {0x98, 0x24, 0x58, 0x46, 0xee, 0x76, 0x6a, 0x97 } }
+
[Protocols]
## Include/Protocol/Pcd.h
gPcdProtocolGuid = { 0x11B34006, 0xD85B, 0x4D0A, { 0xA2, 0x90, 0xD5, 0xA5, 0x71, 0x31, 0x0E, 0xF7 }}
--
1.9.5.msysgit.0


------------------------------------------------------------------------------
Jeff Fan
2015-06-11 08:50:38 UTC
Permalink
This file references EFI_PEI_SERVICES but it will be used by CPU MP DXE driver
to get CPU BIST information. And PiCis.h could pass build.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <***@intel.com>
CC: Liming Gao <***@intel.com>
---
MdePkg/Include/Ppi/SecPlatformInformation.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/MdePkg/Include/Ppi/SecPlatformInformation.h b/MdePkg/Include/Ppi/SecPlatformInformation.h
index a6a62f4..b43499c 100644
--- a/MdePkg/Include/Ppi/SecPlatformInformation.h
+++ b/MdePkg/Include/Ppi/SecPlatformInformation.h
@@ -6,7 +6,7 @@
environment and also encapsulates knowledge of at least the
location of the Boot Firmware Volume (BFV).

-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
@@ -23,6 +23,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#ifndef __SEC_PLATFORM_INFORMATION_PPI_H__
#define __SEC_PLATFORM_INFORMATION_PPI_H__

+#include <Pi/PiPeiCis.h>
+
#define EFI_SEC_PLATFORM_INFORMATION_GUID \
{ \
0x6f8c2b35, 0xfef4, 0x448d, {0x82, 0x56, 0xe1, 0x1b, 0x19, 0xd6, 0x10, 0x77 } \
--
1.9.5.msysgit.0


------------------------------------------------------------------------------
Gao, Liming
2015-06-15 05:43:34 UTC
Permalink
Reviewed-by: Liming Gao <***@intel.com>

-----Original Message-----
From: Fan, Jeff
Sent: Thursday, June 11, 2015 4:51 PM
To: edk2-***@lists.sourceforge.net
Cc: Gao, Liming
Subject: [Patch 2/3] MdePkg: Include PiCis.h in SecPlatformInformation.h

This file references EFI_PEI_SERVICES but it will be used by CPU MP DXE driver to get CPU BIST information. And PiCis.h could pass build.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <***@intel.com>
CC: Liming Gao <***@intel.com>
---
MdePkg/Include/Ppi/SecPlatformInformation.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/MdePkg/Include/Ppi/SecPlatformInformation.h b/MdePkg/Include/Ppi/SecPlatformInformation.h
index a6a62f4..b43499c 100644
--- a/MdePkg/Include/Ppi/SecPlatformInformation.h
+++ b/MdePkg/Include/Ppi/SecPlatformInformation.h
@@ -6,7 +6,7 @@
environment and also encapsulates knowledge of at least the
location of the Boot Firmware Volume (BFV).

-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at @@ -23,6 +23,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#ifndef __SEC_PLATFORM_INFORMATION_PPI_H__
#define __SEC_PLATFORM_INFORMATION_PPI_H__

+#include <Pi/PiPeiCis.h>
+
#define EFI_SEC_PLATFORM_INFORMATION_GUID \
{ \
0x6f8c2b35, 0xfef4, 0x448d, {0x82, 0x56, 0xe1, 0x1b, 0x19, 0xd6, 0x10, 0x77 } \
--
1.9.5.msysgit.0


------------------------------------------------------------------------------
Jeff Fan
2015-06-11 08:50:39 UTC
Permalink
Get CPU BIST information from gEfiSecPlatformInformation2PpiGuid or
gEfiSecPlatformInformationPpiGuid Guided HOB and update the CPU healthy status
for CPU MP Service.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <***@intel.com>
CC: Feng Tian <***@intel.com>
---
UefiCpuPkg/CpuDxe/CpuDxe.inf | 8 +++-
UefiCpuPkg/CpuDxe/CpuMp.c | 90 +++++++++++++++++++++++++++++++++++++++++++-
UefiCpuPkg/CpuDxe/CpuMp.h | 6 ++-
3 files changed, 101 insertions(+), 3 deletions(-)

diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf b/UefiCpuPkg/CpuDxe/CpuDxe.inf
index 61bc55a..a251922 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.inf
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.inf
@@ -1,7 +1,7 @@
## @file
# Simple CPU driver installs CPU Architecture Protocol.
#
-# Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -43,6 +43,8 @@
CpuExceptionHandlerLib
TimerLib
SynchronizationLib
+ HobLib
+ ReportStatusCodeLib

[Sources]
ApStartup.c
@@ -77,6 +79,10 @@
gIdleLoopEventGuid ## CONSUMES ## Event
gEfiVectorHandoffTableGuid ## SOMETIMES_CONSUMES ## SystemTable

+[Ppis]
+ gEfiSecPlatformInformation2PpiGuid ## UNDEFINED # HOB
+ gEfiSecPlatformInformationPpiGuid ## UNDEFINED # HOB
+
[Pcd]
gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber ## CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize ## CONSUMES
diff --git a/UefiCpuPkg/CpuDxe/CpuMp.c b/UefiCpuPkg/CpuDxe/CpuMp.c
index fa0ef37..41bf504 100644
--- a/UefiCpuPkg/CpuDxe/CpuMp.c
+++ b/UefiCpuPkg/CpuDxe/CpuMp.c
@@ -1,7 +1,7 @@
/** @file
CPU DXE Module.

- Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -1521,6 +1521,89 @@ InitMpSystemData (
}

/**
+ Collects BIST data from HOB.
+
+ This function collects BIST data from HOB built from Sec Platform Information
+ PPI or SEC Platform Information2 PPI.
+
+**/
+VOID
+CollectBistDataFromHob (
+ VOID
+ )
+{
+ EFI_HOB_GUID_TYPE *GuidHob;
+ EFI_SEC_PLATFORM_INFORMATION_RECORD2 *SecPlatformInformation2;
+ EFI_SEC_PLATFORM_INFORMATION_RECORD *SecPlatformInformation;
+ UINTN NumberOfData;
+ EFI_SEC_PLATFORM_INFORMATION_CPU *CpuInstance;
+ EFI_SEC_PLATFORM_INFORMATION_CPU BspCpuInstance;
+ UINTN ProcessorNumber;
+ UINT32 InitialLocalApicId;
+ CPU_DATA_BLOCK *CpuData;
+
+ SecPlatformInformation2 = NULL;
+ SecPlatformInformation = NULL;
+
+ //
+ // Get gEfiSecPlatformInformation2PpiGuid Guided HOB firstly
+ //
+ GuidHob = GetFirstGuidHob (&gEfiSecPlatformInformation2PpiGuid);
+ if (GuidHob != NULL) {
+ //
+ // Sec Platform Information2 PPI includes BSP/APs' BIST information
+ //
+ SecPlatformInformation2 = GET_GUID_HOB_DATA (GuidHob);
+ NumberOfData = SecPlatformInformation2->NumberOfCpus;
+ CpuInstance = SecPlatformInformation2->CpuInstance;
+ } else {
+ //
+ // Otherwise, get gEfiSecPlatformInformationPpiGuid Guided HOB
+ //
+ GuidHob = GetFirstGuidHob (&gEfiSecPlatformInformationPpiGuid);
+ if (GuidHob != NULL) {
+ SecPlatformInformation = GET_GUID_HOB_DATA (GuidHob);
+ NumberOfData = 1;
+ //
+ // SEC Platform Information only includes BSP's BIST information
+ // does not have BSP's APIC ID
+ //
+ BspCpuInstance.CpuLocation = GetApicId ();
+ BspCpuInstance.InfoRecord.IA32HealthFlags.Uint32 = SecPlatformInformation->IA32HealthFlags.Uint32;
+ CpuInstance = &BspCpuInstance;
+ } else {
+ DEBUG ((EFI_D_INFO, "Does not find any HOB stored CPU BIST information!\n"));
+ //
+ // Does not find any HOB stored BIST information
+ //
+ return;
+ }
+ }
+
+ while (NumberOfData--) {
+ for (ProcessorNumber = 0; ProcessorNumber < mMpSystemData.NumberOfProcessors; ProcessorNumber++) {
+ CpuData = &mMpSystemData.CpuDatas[ProcessorNumber];
+ InitialLocalApicId = (UINT32) CpuData->Info.ProcessorId;
+ if (InitialLocalApicId == CpuInstance[NumberOfData].CpuLocation) {
+ //
+ // Update CPU health status for MP Services Protocol according to BIST data.
+ //
+ if (CpuInstance[NumberOfData].InfoRecord.IA32HealthFlags.Uint32 != 0) {
+ CpuData->Info.StatusFlag &= ~PROCESSOR_HEALTH_STATUS_BIT;
+ //
+ // Report Status Code that self test is failed
+ //
+ REPORT_STATUS_CODE (
+ EFI_ERROR_CODE | EFI_ERROR_MAJOR,
+ (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_SELF_TEST)
+ );
+ }
+ }
+ }
+ }
+}
+
+/**
Callback function for ExitBootServices.

@param Event Event whose notification function is being invoked.
@@ -1597,6 +1680,11 @@ InitializeMpSupport (

mAPsAlreadyInitFinished = TRUE;

+ //
+ // Update CPU healthy information from Guided HOB
+ //
+ CollectBistDataFromHob ();
+
Status = gBS->InstallMultipleProtocolInterfaces (
&mMpServiceHandle,
&gEfiMpServiceProtocolGuid, &mMpServicesTemplate,
diff --git a/UefiCpuPkg/CpuDxe/CpuMp.h b/UefiCpuPkg/CpuDxe/CpuMp.h
index 021b808..d2866e4 100644
--- a/UefiCpuPkg/CpuDxe/CpuMp.h
+++ b/UefiCpuPkg/CpuDxe/CpuMp.h
@@ -1,7 +1,7 @@
/** @file
CPU DXE MP support

- Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -15,8 +15,12 @@
#ifndef _CPU_MP_H_
#define _CPU_MP_H_

+#include <Ppi/SecPlatformInformation.h>
+#include <Ppi/SecPlatformInformation2.h>
#include <Protocol/MpService.h>
#include <Library/SynchronizationLib.h>
+#include <Library/HobLib.h>
+#include <Library/ReportStatusCodeLib.h>

/**
Initialize Multi-processor support.
--
1.9.5.msysgit.0


------------------------------------------------------------------------------
Tian, Feng
2015-06-15 06:24:28 UTC
Permalink
Reviewed-by: Feng Tian <***@intel.com>

-----Original Message-----
From: Fan, Jeff
Sent: Thursday, June 11, 2015 16:51
To: edk2-***@lists.sourceforge.net
Cc: Tian, Feng
Subject: [Patch 3/3] UefiCpuPkg/CpuDxe: Get CPU BIST information from Guided HOB

Get CPU BIST information from gEfiSecPlatformInformation2PpiGuid or gEfiSecPlatformInformationPpiGuid Guided HOB and update the CPU healthy status for CPU MP Service.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <***@intel.com>
CC: Feng Tian <***@intel.com>
---
UefiCpuPkg/CpuDxe/CpuDxe.inf | 8 +++-
UefiCpuPkg/CpuDxe/CpuMp.c | 90 +++++++++++++++++++++++++++++++++++++++++++-
UefiCpuPkg/CpuDxe/CpuMp.h | 6 ++-
3 files changed, 101 insertions(+), 3 deletions(-)

diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf b/UefiCpuPkg/CpuDxe/CpuDxe.inf index 61bc55a..a251922 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.inf
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.inf
@@ -1,7 +1,7 @@
## @file
# Simple CPU driver installs CPU Architecture Protocol.
#
-# Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2008 - 2015, Intel Corporation. All rights
+reserved.<BR>
# This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License # which accompanies this distribution. The full text of the license may be found at @@ -43,6 +43,8 @@
CpuExceptionHandlerLib
TimerLib
SynchronizationLib
+ HobLib
+ ReportStatusCodeLib

[Sources]
ApStartup.c
@@ -77,6 +79,10 @@
gIdleLoopEventGuid ## CONSUMES ## Event
gEfiVectorHandoffTableGuid ## SOMETIMES_CONSUMES ## SystemTable

+[Ppis]
+ gEfiSecPlatformInformation2PpiGuid ## UNDEFINED # HOB
+ gEfiSecPlatformInformationPpiGuid ## UNDEFINED # HOB
+
[Pcd]
gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber ## CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize ## CONSUMES
diff --git a/UefiCpuPkg/CpuDxe/CpuMp.c b/UefiCpuPkg/CpuDxe/CpuMp.c index fa0ef37..41bf504 100644
--- a/UefiCpuPkg/CpuDxe/CpuMp.c
+++ b/UefiCpuPkg/CpuDxe/CpuMp.c
@@ -1,7 +1,7 @@
/** @file
CPU DXE Module.

- Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2008 - 2015, Intel Corporation. All rights
+ reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at @@ -1521,6 +1521,89 @@ InitMpSystemData ( }

/**
+ Collects BIST data from HOB.
+
+ This function collects BIST data from HOB built from Sec Platform
+ Information PPI or SEC Platform Information2 PPI.
+
+**/
+VOID
+CollectBistDataFromHob (
+ VOID
+ )
+{
+ EFI_HOB_GUID_TYPE *GuidHob;
+ EFI_SEC_PLATFORM_INFORMATION_RECORD2 *SecPlatformInformation2;
+ EFI_SEC_PLATFORM_INFORMATION_RECORD *SecPlatformInformation;
+ UINTN NumberOfData;
+ EFI_SEC_PLATFORM_INFORMATION_CPU *CpuInstance;
+ EFI_SEC_PLATFORM_INFORMATION_CPU BspCpuInstance;
+ UINTN ProcessorNumber;
+ UINT32 InitialLocalApicId;
+ CPU_DATA_BLOCK *CpuData;
+
+ SecPlatformInformation2 = NULL;
+ SecPlatformInformation = NULL;
+
+ //
+ // Get gEfiSecPlatformInformation2PpiGuid Guided HOB firstly //
+ GuidHob = GetFirstGuidHob (&gEfiSecPlatformInformation2PpiGuid);
+ if (GuidHob != NULL) {
+ //
+ // Sec Platform Information2 PPI includes BSP/APs' BIST information
+ //
+ SecPlatformInformation2 = GET_GUID_HOB_DATA (GuidHob);
+ NumberOfData = SecPlatformInformation2->NumberOfCpus;
+ CpuInstance = SecPlatformInformation2->CpuInstance;
+ } else {
+ //
+ // Otherwise, get gEfiSecPlatformInformationPpiGuid Guided HOB
+ //
+ GuidHob = GetFirstGuidHob (&gEfiSecPlatformInformationPpiGuid);
+ if (GuidHob != NULL) {
+ SecPlatformInformation = GET_GUID_HOB_DATA (GuidHob);
+ NumberOfData = 1;
+ //
+ // SEC Platform Information only includes BSP's BIST information
+ // does not have BSP's APIC ID
+ //
+ BspCpuInstance.CpuLocation = GetApicId ();
+ BspCpuInstance.InfoRecord.IA32HealthFlags.Uint32 = SecPlatformInformation->IA32HealthFlags.Uint32;
+ CpuInstance = &BspCpuInstance;
+ } else {
+ DEBUG ((EFI_D_INFO, "Does not find any HOB stored CPU BIST information!\n"));
+ //
+ // Does not find any HOB stored BIST information
+ //
+ return;
+ }
+ }
+
+ while (NumberOfData--) {
+ for (ProcessorNumber = 0; ProcessorNumber < mMpSystemData.NumberOfProcessors; ProcessorNumber++) {
+ CpuData = &mMpSystemData.CpuDatas[ProcessorNumber];
+ InitialLocalApicId = (UINT32) CpuData->Info.ProcessorId;
+ if (InitialLocalApicId == CpuInstance[NumberOfData].CpuLocation) {
+ //
+ // Update CPU health status for MP Services Protocol according to BIST data.
+ //
+ if (CpuInstance[NumberOfData].InfoRecord.IA32HealthFlags.Uint32 != 0) {
+ CpuData->Info.StatusFlag &= ~PROCESSOR_HEALTH_STATUS_BIT;
+ //
+ // Report Status Code that self test is failed
+ //
+ REPORT_STATUS_CODE (
+ EFI_ERROR_CODE | EFI_ERROR_MAJOR,
+ (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_SELF_TEST)
+ );
+ }
+ }
+ }
+ }
+}
+
+/**
Callback function for ExitBootServices.

@param Event Event whose notification function is being invoked.
@@ -1597,6 +1680,11 @@ InitializeMpSupport (

mAPsAlreadyInitFinished = TRUE;

+ //
+ // Update CPU healthy information from Guided HOB //
+ CollectBistDataFromHob ();
+
Status = gBS->InstallMultipleProtocolInterfaces (
&mMpServiceHandle,
&gEfiMpServiceProtocolGuid, &mMpServicesTemplate, diff --git a/UefiCpuPkg/CpuDxe/CpuMp.h b/UefiCpuPkg/CpuDxe/CpuMp.h index 021b808..d2866e4 100644
--- a/UefiCpuPkg/CpuDxe/CpuMp.h
+++ b/UefiCpuPkg/CpuDxe/CpuMp.h
@@ -1,7 +1,7 @@
/** @file
CPU DXE MP support

- Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2015, Intel Corporation. All rights
+ reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at @@ -15,8 +15,12 @@ #ifndef _CPU_MP_H_ #define _CPU_MP_H_

+#include <Ppi/SecPlatformInformation.h> #include
+<Ppi/SecPlatformInformation2.h>
#include <Protocol/MpService.h>
#include <Library/SynchronizationLib.h>
+#include <Library/HobLib.h>
+#include <Library/ReportStatusCodeLib.h>

/**
Initialize Multi-processor support.
--
1.9.5.msysgit.0


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